Integrated Millimeter-Wave Antennas for On-Chip Communication

This paper introduces the design and analysis of circularly polarized (CP) and dual-polarized on-chip microstrip antennas for wireless communication at 60 GHz. The CP on-chip antenna consists of a circular aluminum patch with two overlapped circular slots fed by the transmission line. The radiation characteristics of the CP have been analyzed using the finite integration technique and finite element method based electromagnetic solvers. The CP antenna introduces left-hand circular polarization and employs as on-chip transmitter. A design of dual-polarized on-chip microstrip antenna at 60 GHz is investigated and is employed as on-chip receiver. The dual ports of the dual polarized antenna are designed with high isolation between them in order to be used as a two on-chip receivers. The radiation characteristics of the dual-port antenna have been calculated. The effect of the separation distance between the CP-antenna and the dual-polarized antenna on the same chip has been investigated. The performance parameters like the reflection coefficient, transmission coefficient, and the transmission gain of the two antennas at different separation distances have been introduced.


Introduction
Recently, there is a special interest in the short range communication applications in the 60-GHz band [1].A variety of applications such as uncompressed high definition video streaming, mobile distributed computing, wireless gaming, internet access, and wireless personal area networks falls into the 60 GHz band communications interest [2].This frequency band is characterized by high attenuation of atmospheric oxygen of 10-15 dB/km in a bandwidth of about 7 GHz centered at 60 GHz [3].A multi-Gbps wireless connectivity can be realized for short distances between electronic devices for this communication [4].The data rate increases to 40-100 times faster than current technologies.Integration of the antennaon-chip with different communication circuits introduces low fabrication cost due to the elimination of cost associated with materials required for off-chip (external) antennas [5].Moreover, the antenna matching circuits will be eliminated as the 50 Ohm boundary is no longer needed.
The antenna integration, on-chip allows one step fabrication for the solid wireless system.
Complementary metal-oxide semiconductor (CMOS) is an effective technology because its high-frequency performance has been improved through scaling [6].A typical 0.18 µm CMOS-technology consists of 6-8 metal layers embedded in silicon oxide layers is introduced in [7].The top metal layer is utilized to fabricate the on-chip antennas, while the bottom metal layer is applied as a ground shield for reducing the losses [6].However, the CMOS substrate is characterized by low resistivity and high permittivity; hence, antenna on-chip performance is poor in terms of gain, radiation efficiency and front-to-back ratio (FBR).Different antennas have been integrated in CMOS systems such as dipoles, dielectric resonator antennas, and microstrip antennas in the literature [8][9][10].The antenna radiation characteristics are improved by using on-chip ground where the bottom metal layer is used as a ground shield for reducing the losses from low resistivity silicon substrate.An on-chip antenna has also been employed as a transformer in radio frequency identification systems (RFIDs) [11].A single chip transceiver with on-chip antennas can provide a wireless communication link for sensor network.On-chip antennas can be employed for wireless data communication between different chips to minimize the pin counts, reducing the form factor, packaging costs, and signal delays [12].Two-dipole pairs have been investigated for chip to chip communication in [13].Circularly polarized (CP) antennas are desirable in wireless communication to minimize the path loss between the transmitter and receiver antennas and freedom of their orientation.A 60 GHz artificial magnetic conductor based CP on-chip antenna has been designed and fabricated using standard 0.18 µm six metal-layer CMOS technology in [14].
In this paper, the connection between CP on-chip antenna and dual-polarized on-chip antenna integrated for a 60-GHz CMOS single-chip transceiver is designed and analyzed.The radiation characteristics of on-chip antennas are investigated.The CP on-chip antenna is used as a transmitter, while dual-polarized on-chip antenna with dual feed transmission lines is used as a receiver for two different circuits on the same chip.The effect of the separation distance between the CP-and dual-polarized onchip antennas on the radiation characteristics of the two antennas have been investigated.The HFSS finite element method (FEM) [15] and the CST Microwave studio finite integration technique (FIT) [16] -based on 3-D full-wave electromagnetic solvers are used for the simulation in this paper.

Circularly-polarized circular microstrip on-chip patch antenna
A schematic of the proposed CMOS on-chip CP-microstrip antenna is shown in Fig. 1a.The antenna consists of circular patch printed on the CMOS substrate six-layer structure.The circular microstrip antenna dimensions are designed for dominant mode TM11 at 60 GHz applications.The resonance frequency is given by [17] where R e is the effective patch radius due to the fringing effect, and ε re is the effective relative dielectric constant of the substrate.A fine tuning for the patch dimensions is used to adjust the resonance frequency.The circular patch is made from aluminium with thickness 1 µm, radius R=0.68 mm and two overlapped identical circular slots with radius R s =0.115 mm and center to center separation C=74 µm are cut out from the patch.A microstrip transmission line is used for feeding the patch.The transmission line consists of two sections for impedance transformation and has dimensions L t =0.2 mm, L f =0.435 mm, w t =10 µm and w f =30 µm.The microstrip patch antenna and the transmission line are on the top metal layer in the CMOS structure.A silicon oxide substrate with ε r =4, length L s =2.4 mm, width w s =2.2 mm, and thickness h d of 22 µm is placed under the circular patch.The first metal layer in the CMOS structure is used as on-chip ground under the silicon oxide layer.The silicon chip substrate with ε r =11.9 and σ=10 S/m and thickness h s of 300 µm is placed beneath the ground plane.

Dual-polarized square microstrip patch on-chip antenna
The geometry of the dual-polarized square microstrip patch on-chip antenna with detailed dimensions is shown in Fig. 5.The square patch is printed on a silicon oxide substrate of thickness h d =22 µm with aluminium ground plane.The resonance frequency for the fundamental mode TM 10 is given by [17] where L pe is the effective patch length due to the fringing effect.The square patch has side-length L p =1.The variations of the reflection coefficients (S 22 and S 33 ) and the isolation (S 32 ) for both the X-port (in x-axis direction) and Y-port (in y-axis direction) versus frequency are presented in Fig. 6a.The same reflection coefficient variation versus frequency is obtained for both the X-and Y-ports due to the symmetry in the patch and the transmission line position on the antenna.The resonance frequency is 60 GHz with impedance matching bandwidth of 1.120 GHz.Good isolation between the two ports is obtained and it is close to -25.4 dB at 60 GHz and below this value over the whole frequency band.The variations of antenna gain and radiation efficiency versus frequency for the dual-ports are shown in Fig. 6b.Both the X-port and Yport introduce maximum gain of 0.7 dBi and radiation efficiency of 25% at 60 GHz.The simulated surface current distributions on the dual-polarized microstrip patch on-chip antenna for the both the X-port and Y-port at 60 GHz are shown in Fig. 7.For the X-port, the surface current distribution has its maximum value along the x-directed.For the Y-port, the surface current distribution has its maximum value on the y-directed.Identical surface current distribution, but with cross-polarization is obtained for both the X-and Y-ports.The radiation patterns for the X-and Yports at 60 GHz in different planes are shown in Fig. 8.The FBR is 29/28 dB and the co-/cross-polar level of 33/33 dB for the X-/Y-port in the x-z plane.The FBR is 30/29dB and the co-/cross-polar level of 34/32 dB for the X-/Y-port in the y-z plane.In order to investigate the effect of the CMOS six-metal layers structure on the radiation characteristics of the on-chip antenna, the metal layers are inserted with the dual-polarized antenna as shown in Fig. 9a.The six-metal layers are surrounding the patch to investigate its effect on the antenna radiation characteristics.The variation of the reflection coefficient versus frequency for the dualpolarized antenna is shown in Fig. 9b.A slight shift in the resonance frequency of about 0.5 GHz with nearly the same matching bandwidth due to the presence of the six-metal layers.This shift can mainly take into account during the antenna design by adjusting the patch dimensions.

Circular polarized and dual polarized antennas on the same chip:
For multi-chip wireless communications, both the CPmicrostrip and dual-polarized microstrip patch on-chip antennas are placed face-to-face with a separation distance D between their edges, as shown in Fig. 10a.The CPmicrostrip patch on-chip antenna is applied as a transmitting antenna and the dual-polarized microstrip patch on-chip antenna is applied as a receiving antenna.The power transmission gain (Gi) between the transmitting and the receiving antenna, is defined by Due to the high isolation between the X-and Y-port of the dual-polarized antenna, the two ports can be considered as a two separate receiving antennas.The CP-microstrip patch on-chip antenna is considered as a transmitting antenna and each port of the dual-polarized antenna is considered as a receiving antenna.The variation of the transmission gain between the two antennas versus frequency at different separation distance D for the X-and Y-port is shown in Fig. 12a.For both the Xand Y-port, the transmission gain is decreased with increasing the separation distance between the antennas as shown in Fig. 12b.The transmission gain and transmission coefficient decreasing rate for the Y-port is faster than that for the X-port due to their positions relative to the CPantenna.The transmission gain varies from -23.5 dB to -43 dB for the Y-port while it varies from -29.5 dB to -35.5 dB for the X-port.The radiation efficiency variation versus separation distance at 60 GHz is nearly the same of about 25 % dominate for both ports at different separation distances.

CONCLUSION
The paper introduces two different designs for on-chip microstrip antennas for wireless data transmission at 60 GHz applications.The first proposed design is a circularly polarized circular microstrip patch on-chip antenna with two overlapped circular slots fed by microstrip transmission line using the 0.18 µm CMOS technology.The antenna introduces an impedance matching bandwidth of 2.85 GHz centered at 60 GHz.The antenna gives left-hand circular polarization with axial ratio bandwidth of 600 MHz (6%).Maximum gain of 0.3 dB and radiation efficiency of 25 % at 60 GHz are obtained.The second proposed on-chip antenna is a dual-port square patch with dual feeding transmission lines at two orthogonal edges of the patch for 60 GHz applications.Good isolation between the two ports is obtained (about -25.4 dB at 60 GHz).Both the X-port and Y-port introduces a maximum gain of 0.7 dB and radiation efficiency of 25% at 60 GHz due to the symmetry in the antenna configuration.The CP-microstrip patch on-chip antenna is considered as a transmitting antenna and each port of the dual-polarized antenna is considered as a receiving antenna.The impedance matching bandwidth is varied between 2 GHz for D=0.5 mm and 2.4 GHz for D=1 mm with nearly the same resonant frequency.As the distance is increased the transmission coefficients between the CP-microstrip on-chip antenna (port-1) and the X-(port-3) and Y-(port-2) ports are decreased.

Fig. 6 aFig. 7 .Fig. 8 .Fig. 9 a
Fig.6 a.The variation of the S-parameters versus frequency for the dual-polarized microstrip patch on-chip antenna.b.The variation of gain and radiation efficiency versus frequency for the dual-polarized microstrip patch on-chip antenna.

a. 2 Fig. 11 .
Fig. 10a.The detailed arrangement of the CP microstrip and the dual-polarized microstrip patch on-chip antenna with separation distance D. b.The variation of the reflection coefficient of the CP-microstrip patch on-chip antenna in the presence of the dual-polarized on-chip antenna versus frequency for different separation distance D.
Fig. 12.The transmission gain versus frequency and the transmission gain versus separation distance between the CP-microstrip on-chip antenna (port 1) and the dualpolarized on-chip antenna (Y-port (2) and X-port (3)) versus separation distance D at 60 GHz.