Assessment of 50 %-Propagation-Delay for Cascaded PCB Non-Linear Interconnect Lines for the High-Rate Signal Integrity Analysis

This paper is a special issue from the work presented in the Advanced Electromagnetics Symposium 2012 (AES’12) which presents an enlarged study about the 50-% propagation-time assessment of cascaded transmission lines (TLs). First and foremost, the accurate modeling and measurement technique of signal integrity (SI) for high-rate microelectronic interconnection is recalled. This model is based on the reduced transfer function extracted from the electromagnetic (EM) behavior of the interconnect line RLCG-parameters. So, the transfer function established takes into account both the frequency dispersion effects and the different propagation modes. In addition, the transfer function includes also the load and source impedance effects. Then, the SI analysis is proposed for high-speed digital signals through the developed model. To validate the model understudy, a prototype of microstrip interconnection with w = 500 μm and length d = 33 mm was designed, simulated, fabricated and tested. Then, comparisons between the frequency and time domain results from the model and from measurements are performed. As expected, good agreement between the S-parameters form measurements and the model proposed is obtained from DC to 8 GHz. Furthermore, a de-embedding method enabling to cancel out the connectors and the probe effects are also presented. In addition, an innovative time-domain characterization is proposed in order to validate the concept with a 2.38 Gbit/sinput data signal. Afterwards, the 50-% propagation-time assessment problem is clearly exposed. Consequently an extracting theory of this propagation-time with first order RC-circuits is presented. Finally, to show the relevance of this calculation, propagation-time simulations and an application to signal integrity issues are offered.


Introduction
Over the last 50 years, the tremendous growth of the microelectronics industry has lead to an incessant increase of operating frequencies and integration scale densities of the chips and the electronic systems [1].The combination of the functional diversification ("More than Moore") and the integration technologies ("More Moore") lead to new EMC challenges in order to make coexisting these micro-systems in restricted environments [1][2].This arrangement of technologies is the worthwhile and strategic work to target in order to obtain a high value system [2][3][4].In addition to this constant increase in density, since the digital systems reach very high data rates, the fidelity of these RF-digital signals must be taken into account by designers [3][4][5][6], [11].In order to preserve the acceptable functioning of modern high speed digital electronics, since the early 1990s, critical requirements on the signal integrity (SI) were established [3], [5][6].It is widespread that all electronic products have the same configuration, there are drivers that outputting signals to receivers through the interconnects [6].This statement illustrates that the effects of interconnection lines cannot be neglected [7][8], for integrated circuits (ICs) [9] and PCBs [10][11].
Subsequently, one of the most important degradations in such systems is linked to the interconnection modeling for high-speed applications [1][2][3], [6], [12].For this reason, more and more accurate interconnection network models are necessary to balance correctly the signals at different stage of the electronic boards [10][11][12].A fast and accurate modeling of PCB TLs (Printed Circuit Boards Transmission Lines) for high-rate digital-mixed signal interconnects has been recently performed [13][14].Whereas PCBs or TLs are well-known since the early of 1980s [15], some improvements seem to be still required [11] for the better understanding of the physical behavior [16] and the signal integrity forecasting for modern applications [17][18][19][20][21][22].Indeed, facing to the widespread microwave theory, the PCB interconnects require faster and more accurate broadband models [18] and measurement techniques [23].Therefore this field of investigation is extremely attractive, in particular for differential TLs or multilayer TLs [17] and time-domain analysis [24][25].Undeniably, over the last five years many enhancements about the knowledge of TLs behavior have been highlighted [16][17][18][19][20][21][22][23][24][25][26].Despite this technical progress, a major issue is inherent to the time-domain prediction [27] and the calibration process [23].In fact, the de-embedding technique is the critical point in order to accomplish a good agreement with the models [28].Consequently, the ABCD matrix is one parameter which allows one to explore this bottleneck [17], [29], particularly for estimating the transient responses [25][26][27][28].This statement motivates us to develop simpler and faster models to forecast the transient responses for digital interconnection lines on PCBs to help designers for high-speed applications [13][14], [30].Moreover, as exposed above, interconnects play an important role in designing modern electronic and microelectronic systems.So the degradations engendered by these interconnects can be partially reduced by the repeaters insertion [31] or completely reduced using the NGD concept as recently introduced [32][33][34][35].
Furthermore, since the early 1990s, it has been evidenced that the interconnect delays of high speed digital IC dominate widely gate delays [1].In telecommunication area, these technological issues can be sources of distortions, asynchronous effects of the transmitted analog signals and erroneous symbols of numerical data.In order to deal with this difficulty, intensive researches for the enhancement of on-chip interconnects have been conducted [36][37][38][39][40][41].To estimate the interconnect delay, the most popular method is based on the use of RC-models as introduced by Elmore in 1948 [42][43][44][45][46][47][48][49][50][51][52][53][54].In that case, the propagation delay expression can be established only from the first order approximation of the system transfer function.The main advantage of this model lies on its simplicity and its possibility for fast delay estimation when considering sophisticated signal paths of integrated system.However, its drawback is its drastic high imprecision compared to other high order delay models.It was reported that Elmore model can involve to more than 30-% relative errors [55][56][57].For this reason, more accurate approximated second order RLC model with closed form of delay times (propagation-, rise-/fall-and settling-time delays) were developed in [55][56][57].Furthermore, as developed in [56][57], authors determine the step unit response of lumped RLC tree networks via second moments of the polynomial transfer function.Then, they deduce the basic characteristics of the transient response (over-or under-damped responses) and propose also the specific expression of 2nd order propagation delay.The main advantage of this 2nd order delay model is the fact that it enables to investigate the signal delay with good accuracy even for non-monotone time-domain responses.Furthermore, compared to SPICE-computation, this model can guarantee relative errors lower than 5%.Propagation delay T p is one of the fundamental important parameters for the evaluation of the numerical-analogue high-speed system characteristics.This delay plays an important role for the interconnect structure optimization [58].In fact, the propagation delay can limit the speed or the rate f max of the operating data as explained by the relation: Till now, the most popular model for estimating the propagation delay was established by Elmore [9], [59][60][61].
To overcome this technical limitation, in this paper, a modeling method of cascaded system propagation delay is established.To gain a better understanding, this paper is structured in five sections, with the first third sections from the works presented in [70].Section 2 offers the theoretical approach of extracting the RLCG model of microstrip lines.First of all, the characteristic impedance and the propagation constant including frequency dispersion and propagation modes effects are established in function of the geometrical and physical properties of the interconnect line.Then the overall voltage transfer function for an interconnected electronic system is extracted, including source impedance and load impedance effects.In order to demonstrate the relevance of this model, Section 3 presents frequency-and time-domain investigations performed with an original "omega" shape interconnect line.The validation process will be presented by considering frequency-/time-domains measurements achieved with the innovative improved TDR / TDT (Time-Domain Reflectometry / Time-Domain Transmissiometry) equipment introduced in [62][63][64][65][66][67][68][69].This allows one to illustrate the evidence of the effects of connectors and the de-embedding process consequences.Subsequently, the trouble in evaluating properly the propagation time is exposed, thus a theory of propagationtime extraction is presented in Section 4. This theoretical study is followed by verification results reported in Section 5. Finally, the last section draws the conclusion of the paper.

Theoretical approach
This section is structured in two paragraphs.First, we recall the characterization theory of microstrip lines including the extraction method of per unit length parameters R, L, C and G.Then, knowing the RLCG-model of the line, the analytical expressions of the transfer function and the access impedances of the line are introduced in the second paragraph.

Electromagnetic parameters extraction of a single transmission line (TL)
One considers a microstrip TL, of length d, with EM (Electromagnetic) parameters propagation constant ) and characteristic impedance, Z c (ω), defined from physical properties (permittivity  r , dielectric loss tangent tan, metal resistivity …) and geometrical properties (width w, metallization thickness t and substrate height h) in function of the frequency as sketched on Figure 1.According to the microwave theory [15], the well-known microstrip line synthesis and analysis relations [20], which are used in the EMDS (Electromagnetic Design System) environment of ADS (Advanced Design System) simulation tool, permit to extract the characteristic impedance: where  0 is the air impedance and  eff is the effective relative permittivity of the medium.In order to reach a better accuracy, this model must be valid a wide frequency bandwidth.For this reason, frequency dispersion effects can be taken into account if the characteristic impedance is considered as follow: And by replacing h w u  ,  eff is given by:   In this reminder, it is worthy of note to mention that a particular point of attention should be considered regarding the effective width w eff of the structure.Indeed, a conformal transformation should be performed with respect of the value of u [15] as follow: One also considers the propagation mode effects, hence the propagation constant in function of the frequency can be written, by denoting c the celerity, as: includes the metallic conductor and the dielectric losses respectively given by: For the calculation including the radiating losses, more explicit analytical expressions of the propagation constant real part or the per unit length losses constant α(f) is presented in [15][16].Since the RLCG model is associated with the propagation constant and the characteristic impedance of the transmission line as: one can also extract straightforwardly the RLCG parameters of any interconnect lines by substituting [13]:

Voltage transfer function determination of a TL
Getting an accurate voltage transfer function (VTF) of an interconnection line yields to determine the domain of validity of the presented equations ( 2) to (15).The simpler approximation that one can provide is to bound the upper frequency, f max , in function of the substrate height [11] as: In this case one can assume that the TL offers quasi-TEM solution for propagating.Hence, the TL is characterized by the following ABCD matrix [15]: One proposes the real electronic system like two gates connected together through a PCB interconnection line, as depicted on Figure 2 for evaluating the SI.Since, the SI assessment is based on the equivalent analog bandwidth of a considered input signal.Consequently, the RLCG-interconnection VTF should present the same bandwidth, this becomes challenging especially for highrate signal due to important rise times [13].Indeed, the equivalent frequency bandwidth BW for a trapezoidal signal is related to the 10% to 90% rise time, t r 90-10 , as: As a result, the frequency-domain of validity of the VTF must satisfy relations (22) and (24).So, the overall TL transfer matrix M ij including the source Z S , and load Z L , impedances within the frequency band of interest is given by the matrix product expressed in (25).Afterwards, SI parameters can be established straightforwardly from the impedance matrix and the transient responses [14].
In fact, the VTF denoted H(jω), the input impedance Z in (jω), the output impedance Z out (jω) and the transfer impedance Z T (jω) of the considered system of the Figure 2 are respectively summarized in Table

SI Element Expression
)

Frequency-and time-domain investigations
As concrete proof-of-concept, the "omega" shape microstrip interconnect displayed in Figure 3 was considered and characterized by the TDR/TDT techniques.The equipment used in this experiment applies de-noising algorithms [68] on all the 40-GHz instantaneous bandwidth TDR/TDT traces.This allows performing straightforwardly and accurately the de-embedding of the SMA connectors in [62].The interconnect-under-test (IUT) presents a width w = 0.5 mm, and a length d = 32.944mm printed on the FR4-epoxy substrate, of height h = 1.6 mm, having relative permittivity ε r = 4.4.Figure 4 represents the schematic diagram of the circuit tested by considering an interconnection with complex form.This interconnect corresponds to the length of PCB interconnections for mixed-circuit as PLL or clock distribution [69].EM full-wave simulations of the 3-D structure represented by the black box of Figure 4 were performed in the EM design system environment, "Momentum", of ADS microwave/electronic tool.This IUT was also modeled with the method proposed in Section 2.

Assessing the de-embedding effects
At present time, the de-embedding process of the SPARQ is under consideration.First, the IUT is characterized with using a VNA (Vector Network Analyzer) within the frequency-domain from 100 kHz to 8.5 GHz.The calibration was made in SOLT including port extension (open and short) of the universal test fixture for PCB, as presented by the photograph in Figure 5. Afterwards, comparison was made with the SPARQ measurement in the time-domain for de-embedding ports 1 and 2. The ports are de-embedded via an algorithm that uses S-parameter measurement, and thus the S-parameters for these components must be known prior to the time of measurement.Hence, SPARQ calculates first the gatedport's S-parameters and then uses them in de-embedding connectors [62,63].Table 2 proposes the comparison between the time delays engendered by the connectors obtained from VNA with port extension (SOLT calibration) and TDR/TDT measurement performed with the SPARQ.Then, the S-parameters were also obtained with the SPARQ measurement within the time-domain including the "gating" process for de-embedding connectors [62][63], [68].Hereafter, magnitude of the S 11 (a), S 21 (b) and phase of the S 21 (c) are offered in Figure 6, from the EM simulation (black continuous curves), the proposed model (blue dashed curves), the VNA measurement (green dashed curves) and the SPARQ measurement (red continuous curves).

Application to the signal integrity forecasting
Using the SI Studio feature, a noisy digital-mixed input v in with 2.38-Gbit/s rate and 42-ps rise-time was simulated.Then, in order to emulate SI parameters degradation by considering R s = 20 Ω, R L = 500 Ω and C L = 2 pF, the Virtual-Probing was performed [44].Indeed, the SI Studio capability allows one to forecast the transient response of the system as shown by Figure 7.In addition, comparisons were made between the transient responses obtained from SI Studio with the VNA (green dashed curves) and the SPARQ measurements (red continuous curves) and between the simulations obtained from the developed model (blue dashed curves) and from ADS (ocher dashed curves).An excellent correlation was found between the VNA results and the SPARQ measurements that give evidence of the de-embedding method efficiency.In addition a very good agreement is established between the developed theoretical model and the measurements.
A major issue in signal integrity is inherent to the accurate assessment of the 50%-propagation time.Indeed, this latter is linked to the group delay of the system which evolves considerably in a wide frequency band.To manage this problem some complicated numerical approaches exist, but this difficulty increases when one considers cascaded transmission lines.

Theoretical extraction of the propagation-time
For the complex structures composed of different systems in cascade as the circuit network depicted in Figure 8, the sum of the Elmore propagation delay is generally used [44][45][46][47]: But this relation is susceptible to generate a relative error higher than 35 % [50][56-57].
It is well-known that the voltage transfer function (VTF) of linear circuits can be expressed as: In this case, the Elmore model propagation delay induced by this system is written as [42]: As argued above this expression present a very high inaccuracy [50][56-57], so, in the next paragraphs, we will develop mathematical expressions enabling to realize more precise value of propagation delay associated to more generalized systems.

Transfer function modeling of cascaded RCnetwork
This subsection focus is on the modeling of the RC network introduced in Figure 8 for k = {1…n}.Being given that this lumped network is a linear circuit, its transfer equation should be governed also by a linear differential equation.This finding leads us to suppose that the elements of the ABCD-matrix: with a k and b k are real coefficients.For n = 1, one takes the initial value: For k = {1,…,n}, The whole ABCD-matrix can be determined with the successive matrix product [71]: The coefficients a k and b k can be determined easily via substitutions of expressions ( 30) and (31) into relation (34).This yields the following iterative relations enabling the calculation of three first coefficients corresponding to a k (l) and b k (l) for l = {0, 1, 2}.So, by identification of ) ( , 11 s T n - coefficients, the following expressions are established [71]: The same analysis applied to the ) ( , 12 s T n -coefficients permits to demonstrate the following expressions: By using this polynomial characteristic function, in the next section, we will evaluate the propagation delay for the highorder linear systems.

Propagation delay modeling of first order cascaded systems
For the better illustration, knowing the real constants a  and b  , one assigns the hereafter elementary transfer function: and For the sake of simplification, the following 50%propagation delays are considered: So that one denotes  the real constant higher 1 given by: One demonstrates mathematically that if 4   , the 50%propagation delay associated to the cascaded system with transfer function ) In the contrary case 4   , it is expressed as follows: To verify the effectiveness of this theoretic concept, in the next section, validation results are proposed.

Application to the analysis of the SI issues
Up to certain frequency bandwidth, the microstrip interconnect circuit depicted in Figure 9 can be assumed as an RC-network cascaded.R S and C L represent respectively the source resistance and the load capacitance.Let us consider the structure as presented above having the characteristic summarized in Table 3 and depicted on Figure 10.The physical dimensions of the interconnections are printed on the FR4-substrate (relative permittivity ε r = 4.4 and height h = 500 µm).By applying the modeling method introduced in [13] and [70] one evaluates the per unit length parameters at 7 GHz shown in Table 3.
and propagation constant: the corresponding m ABCD matrix of the m-th interconnect line, denoted [TL m ], where here m = {1,2,3}, is given by: By taking into consideration the maximum frequency bandwidth of a digital signal v in , any transmission lines m can be modeled by N m RC-circuits if N m respects the following condition: Thus, in the presented case the ABCD matrix of each transmission line m will be given by: So the overall matrix denoted M TT , of the whole system presented in Figure 9, can be considered as:  First, the VTF of the whole system was simulated using ADS with the microstrip TL model.By varying C L = {0.5, 1.0, 2.0, 4.0} pF the magnitude (a) and the absolute phase (b) of the VTF is depicted on Figure 11 for case 1 and on Figure 12 for case 2. Then the transient responses were also simulated in the ADS environment by varying C L for case 1 (Figure 13) and case 2 (Figure 14).Finally the 50%propagation time calculated from the described model was compared with the Elmore one and the equivalent RC-model of the TLs in SPICE (Figure 15).Results, including relative errors, are summarized in Table 5 to Table 8.

Conclusions
This paper reviews a modeling method of microstrip interconnections with reduced VTF.The theoretical analyses of the interconnections are recalled.Then, basic expressions of the VTF and access impedances including the driven gate and gate load are established.In order to validate the model established, a particular shape microstrip interconnect was characterized, designed and measured.Investigations both with frequency-and time-domain equipments were achieved in order to characterized PCBinterconnects.The de-embedding technique efficiency of the SPARQ Signal Integrity Network Analyzer was also exposed.The potential use for signal integrity forecasting was clearly shown.An excellent agreement was found between modern and complicate electronic simulation tools and the SI studio and Virtual-Probing environments from SPARQ measurements.
In addition, the interest of developed de-embedding technique can be applied to investigations microelectronic systems, as well bounding wires or lead frame effects compensation.In the continuation of these works, the 3D interconnect coupling in-package effects will be investigated.
The dilemma of assessing the 50%-propagation delay in high-order non-linear interconnects was shown.The role played by the inductive part of transmission line is really important rather than the pure RC-circuit assumption especially for microelectronic interconnects.Numerical modeling of interconnects is a good way to achieve the calculation of SI parameters and reach the existing polynomial theories in complex transfer function.Furthermore, the accurate assessing of 50%-propagation time, rise-time and attenuation by a signal integrity model is necessary to design the new innovative equalization technique introduced [32][33][34][35], [71].

Figure 2 :
Figure 2: Circuit diagram representing interconnect line driven by source gate with impedance Z S and loaded by input impedance Z L .

Figure 4 :
Figure 4: Schematic diagram used for the EM/circuit co-test.

Figure 5 :
Figure 5: Universal test fixture used for the IUT characterization

Figure 6 :
Figure 6: Comparisons of S 11 -amplitude (a) and S 21amplitude (b) and S 21 -phase (c) from the EM model obtained from momentum, the developed model, the VNA measurement and the TDR/TDT measurement.

Figure 7 :
Figure 7: Comparison between the different techniques for a NRZ noisy 2.38 Gpbs input signal.
using this relation, the two different length topologies of the structure presented in Figure10were studied.The number of cells characterizing each TL m by considering a trapezoidal input signal having 50ps rise-time is given below by Table4:

Figure 11 :
Figure 11: Frequency responses versus load C L for the magnitude (a) and the phase (b) of the VTF for case 1.

Figure 12 :
Figure 12: Frequency responses versus load C L for the magnitude (a) and the phase (b) of the VTF for case 2.

Figure 13 :
Figure 13: Transient responses versus load C L for case 1.

Table 2 :
Port extension for de-embedding connectors.

Table 3 :
Parameters of the interconnect microstrip line under consideration.

Table 4 :
Number of elementary cells for d m length in the case 1 and in the case 2.